Exemplary embodiments of the present invention relate to a digital front end receiver using a DC offset compensation scheme, and more particularly, to a digital front end receiver using a DC offset compensation scheme in a mobile communication system supporting multiple channels and multiple bandwidths.
A Digital Front End (DFE) performs a function of enabling the digital modulation and demodulation of a Radio Frequency (RF) receiver by processing a signal before a baseband modem block from an Analog to Digital Converter (ADC) for processing a received RF input signal by using a digital or discrete signal.
A conventional DFE has flexibility capable of supporting multiple modes and multiple bands if it is embodied using digital logic.
A conventional DFE includes a decimator for changing a high output signal of an ADC into a signal of a low sampling frequency, a digital filter for removing noise other than signals, and a sampling rate converter for converting a signal into a signal of an accurate sampling rate necessary for a system standard. The conventional DFE may further include an Automatic Gain Control (AGC) function for enabling a signal to be operated within a proper range in a DFE block.
Furthermore, the conventional DFE has a Cascaded Integrator-Comb (CIC) decimation filter structure for applying a different filtering value and a different decimation rate to each of multiple frequency bandwidths. This CIC decimation filter structure is advantageous in that it does not have a multiplier and it performs a filtering operation without greatly increasing complexity even in a system supporting multiple bandwidths. The CIC decimation filter structure is also advantageous in that a CIC compensation filter and a channel selection filter placed in the rear stage of the DFE may filter a signal band effectively without increasing complexity. Furthermore, in order to handle a change of a CIC output signal, a new CIC decimation filter with which Digital AGC (DAGC) is combined may be configured.
The conventional DFE is problematic in that DC components included in input signals provided to the RF receiver deteriorate the bit efficiency of the DFE.
Furthermore, in a system supporting multiple modes and multiple bands, a DAGC block is used in order to maintain a signal to noise ratio by controlling a signal. In this case, there are problems in that it is difficult to amplify an input signal including a DC component into a signal of a desired level and the input signal may be distorted by the DAGC operation.
The background of the present invention is disclosed in U.S. Patent Laid-Open Publication No. 2009/0068974 (Mar. 12, 2009).